Early SAR ADCs used thin film laser wafer trimmed internal DACs. Today, this approach has been replaced by switched capacitor (charge redistribution) CMOS DACs shown here. The capacitor matching is controlled by the precise lithography, and extra capacitors and switches can be added for trimming either at the factory or as part of autocalibration routines run at the system level after installation. Note that switch SIN performs the sample-and-hold (SHA or SAH) function so no additional SHA is needed. Drawbacks to this architecture include the switching transient currents injected on the analog input which requires the drive circuitry to tolerate these transient currents without loss of accuracy.