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3D-Slide10

In summary, IPDiA is a spin off of Philips semiconductor with more than fifty years in the semiconductor industry, their exclusive focus in recent years has been on 3D silicon passive devices. IPDiA silicon capacitors are developed with the most suitable technology for the each of the related applications and industries. The silicon capacitor JEDEC compatible range is available in most popular size/capacitance values, from few pF up to few µF and include devices with less than 65 ppm/°C derating, from -55° to 250°C, making them a good choice for high temperature sensitive applications. The HSSC range receives an extra burn-in test at the end of the production line, for improved reliability and value. Low profile SiCaps overcome space and volume constraints with a thickness of 100µm and less. With a square form and four pads instead of two as found on the JEDEC compatible devices, the dedicated family of silicon capacitors is specifically designed for embedded and wire-bonding applications. Available in 100µm to 250µm thickness, the low profile EMSC range provides high performance and high stability over the temperature range of -55° to 250°C. The IPDiA vertical silicon capacitor family solves decoupling application issues. These are designed with a bottom electrode to be connected to ground and the top electrode suitable for the wire-bonding.

PTM Published on: 2012-12-19