Si533xx Low-Jitter, Fixed-Format Clock Buffers
Silicon Labs offers its low-jitter, LVCMOS, LVPECL, and LVDS fanout clock buffers with up to 10- or 12-outputs and frequency range from DC to 200 MHz or 1250 MHz
Silicon Labs is significantly expanding the number of fixed-format LVPECL, LVDS, and LVCMOS clock buffers. The fixed-format buffers are recommended for clock distribution applications that need simple fanout buffers and users who are not willing to pay a premium for advanced features, such as clock output format selection and clock division. These buffers deliver more clock outputs and lower jitter than Silicon Labs’ legacy Si5330 fixed-format buffer family. These fixed-format buffers can be matched with Silicon Labs’ high performance clocks like Si5338/35/4x/8x and Si5xx XO/VCXOs, providing competitive clock tree solutions for any application.
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Evaluation Board
Billede | Manufacturer Part Number | Beskrivelse | Funktion | Udnyttet IC/del | Indhold | Tilgængeligt antal | Pris | Vis detaljer | |
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![]() | ![]() | SI53301/4-EVB | EVAL BOARD FOR SI53300 | Clock-buffer | Si53300 | Kort | 0 - Immediate | $940.74 | Vis detaljer |