On this slide, the schematic shows a minimum solution size of 225 mm2, with input capacitance (Cin) = 10 µF, the output capacitance (Cout) = 100 µF, and setting the output voltage with the Rset resistor. In the layout, all of the components are on the top layer. With the 10 x 10 x 4.3 QFN package all the pins are easily accessible, making it easy to inspect solder joints, and easy to route signals and vias.