LT1812 Datasheet by Analog Devices Inc.

L7L|nt “I2 LT1812 TECHNOLOGY L7 LJUW
LT1812
1
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TYPICAL APPLICATION
DESCRIPTION
3mA, 100MHz, 750V/µs
Operational Amplifi er
with Shutdown
The LT
®
1812 is a low power, high speed, very high slew
rate operational amplifi er with excellent DC performance.
The LT1812 features reduced supply current, lower input
offset voltage, lower input bias current and higher DC gain
than other devices with comparable bandwidth. A power
saving shutdown feature reduces supply current to 50μA.
The circuit topology is a voltage feedback amplifi er with the
slewing characteristics of a current feedback amplifi er.
The output drives a 100Ω load to ± 3.5V with ±5V supplies.
On a single 5V supply, the output swings from 1.1V to
3.9V with a 100Ω load connected to 2.5V. The amplifi er
is stable with a 1000pF capacitive load which makes it
useful in buffer and cable driver applications.
The LT1812 is manufactured on Linear Technology’s
advanced low voltage complementary bipolar process.
The dual version is the LT1813. For higher supply voltage
single, dual and quad operational amplifi ers with up to
70MHz gain bandwidth, see the LT1351 through LT1365
data sheets.
4MHz, 4th Order Butterworth Filter
FEATURES
APPLICATIONS
n 100MHz Gain Bandwidth
n 750V/μs Slew Rate
n 3.6mA Maximum Supply Current
n 50μA Supply Current in Shutdown
n 8nV/√Hz Input Noise Voltage
n Unity-Gain Stable
n 1.5mV Maximum Input Offset Voltage
n 4μA Maximum Input Bias Current
n 400nA Maximum Input Offset Current
n 40mA Minimum Output Current, VOUT = ±3V
n ±3.5V Minimum Input CMR, VS = ±5V
n 30ns Settling Time to 0.1%, 5V Step
n Specifi ed at ±5V, Single 5V Supplies
n Operating Temperature Range: –40°C to 85°C
n Low Profi le (1mm) SOT-23 (ThinSOT™)
and S8 Packages
n Wideband Amplifi ers
n
Buffers
n
Active Filters
n
Video and RF Amplifi cation
n
Cable Drivers
n Data Acquisition Systems
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. ThinSOT is a Trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
–
+
LT1812
220pF
VIN
665Ω
232Ω
47pF
232Ω
–
+
LT1812
470pF
1812 TA01
VOUT
562Ω
274Ω
22pF
274Ω
FREQUENCY (MHz)
0.1
–50
VOLTAGE GAIN (dB)
–40
–30
–20
–10
1 10 100
1812 TA02
–60
–70
–80
–90
0
10
VS = ±5V
VIN = 600mVP-P
PEAKING < 0.12dB
Filter Frequency Response
LT1812 TDPV‘EW I: :I I:' :I E El SHDN |:— 7 v' I: :| EA: CA: :3ng C El NC L7LJCUEN2
LT1812
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PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V–) ..............................12.6V
Differential Input Voltage (Transient Only, Note 2) ......±3V
Input Voltage, Shutdown Voltage ...............................±VS
Output Short-Circuit Duration (Note 3) ............. Indefi nite
Operating Temperature Range (Note 8)..... –40°C to 85°C
(Note 1)
V– 2
5 V+
4 –IN
VOUT 1
TOP VIEW
S5 PACKAGE
5-LEAD PLASTIC TSOT-23
+IN 3 +–
TJMAX = 150°C, θJA = 250°C/ W
(NOTE 9)
VOUT 1
V– 2
+IN 3
6 V+
5SHDN
4 –IN
TOP VIEW
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
+–
TJMAX = 150°C, θJA = 230°C/ W
(NOTE 9)
1
2
3
4
8
7
6
5
TOP VIEW
SHDN
V+
VOUT
NC
NC
–IN
+IN
V–
S8 PACKAGE
8-LEAD PLASTIC SO
+
–
TJMAX = 150°C, θJA = 150°C/ W
(NOTE 9)
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION SPECIFIED TEMPERATURE RANGE
LT1812CS5#PBF LT1812CS5#TRPBF LTLH 5-Lead Plastic TSOT-23 0°C to 70°C
LT1812IS5#PBF LT1812IS5#TRPBF LTLJ 5-Lead Plastic TSOT-23 –40°C to 85°C
LT1812CS6#PBF LT1812CS6#TRPBF LTLK 6-Lead Plastic TSOT-23 0°C to 70°C
LT1812IS6#PBF LT1812IS6#TRPBF LTLL 6-Lead Plastic TSOT-23 –40°C to 85°C
LT1812CS8#PBF LT1812CS8#TRPBF 1812 8-Lead Plastic SO 0°C to 70°C
LT1812IS8#PBF LT1812IS8#TRPBF 1812I 8-Lead Plastic SO –40°C to 85°C
Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based fi nish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifi
cations, go to: http://www.linear.com/tapeandreel/
Specifi ed Temperature Range
(Note 8) .................................................... –40°C to 85°C
Maximum Junction Temperature ........................... 150°C
Storage Temperature Range ................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) ................... 300°C
LT1812 L7 LJUW
LT1812
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ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 4) 0.4 1.5 mV
IOS Input Offset Current 30 400 nA
IBInput Bias Current –0.9 ±4 μA
enInput Noise Voltage Density f = 10kHz 8 nV/√Hz
inInput Noise Current Density f = 10kHz 1 pA/√Hz
RIN Input Resistance VCM = ±3.5V
Differential
310
1.5
MΩ
MΩ
CIN Input Capacitance 2pF
VCM Input Voltage Range (Positive)
Input Voltage Range (Negative)
3.5 4.2
–4.2 –3.5
V
V
CMRR Common Mode Rejection Ratio VCM = ±3.5V 75 85 dB
Minimum Supply Voltage ±1.25 ±2 V
PSRR Power Supply Rejection Ratio VS = ±2V to ±5.5V 78 97 dB
AVOL Large-Signal Voltage Gain VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
1.5
1.0
3.0
2.5
V/mV
V/mV
VOUT Maximum Output Swing RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
±3.80
±3.35
±4.0
±3.5
V
V
IOUT Maximum Output Current VOUT = ±3V, 30mV Overdrive ±40 ±60 mA
ISC Output Short-Circuit Current VOUT = 0V, 1V Overdrive (Note 3) ±75 ±110 mA
SR Slew Rate AV = –1 (Note 5) 500 750 V/μs
FPBW Full Power Bandwidth 3V Peak (Note 6) 40 MHz
GBW Gain Bandwidth Product f = 200kHz 75 100 MHz
tr, tfRise Time, Fall Time AV = 1, 10% to 90%, 0.1V, RL = 100Ω 2 ns
OS Overshoot AV = 1, 0.1V, RL = 100Ω 25 %
tPD Propagation Delay AV = 1, 50% VIN to 50% VOUT, 0.1V, RL = 100Ω 2.8 ns
tsSettling Time 5V Step, 0.1%, AV = – 1 30 ns
THD Total Harmonic Distortion f = 1MHz, VOUT = 2VP-P, AV = 2, RL = 500Ω –76 dB
Differential Gain VOUT = 2VP-P, AV = 2, RL = 150Ω 0.12 %
Differential Phase VOUT = 2VP-P, AV = 2, RL = 150Ω 0.07 DEG
ROUT Output Resistance AV = 1, f = 1MHz 0.4 Ω
ISHDN SHDN Pin Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11) –100
0
–50
±1 μA
μA
ISSupply Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11)
3
50
3.6
100
mA
μA
TA = 25°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Note 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 4) 0.5 2.0 mV
IOS Input Offset Current 30 400 nA
IBInput Bias Current –1.0 ±4 μA
enInput Noise Voltage Density f = 10kHz 8 nV/√Hz
inInput Noise Current Density f = 10kHz 1 pA/√Hz
RIN Input Resistance VCM = 1.5V to 3.5V
Differential
310
1.5
MΩ
MΩ
T
A = 25°C, VS = ±5V, VCM = 0V unless otherwise noted (Note 10).
LT1812 L7LJCUEN2
LT1812
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ELECTRICAL CHARACTERISTICS
T
A = 25°C, VS = ±5V, VCM = 0V unless otherwise noted (Note 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
CIN Input Capacitance 2pF
VCM Input Voltage Range (Positive)
Input Voltage Range (Negative)
3.5 4
1 1.5
V
V
CMRR Common Mode Rejection Ratio VCM = 1.5V to 3.5V 73 82 dB
AVOL Large-Signal Voltage Gain VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 1.5V to 3.5V, RL = 100Ω
1.0
0.7
2.0
1.5
V/mV
V/mV
VOUT Maximum Output Swing (Positive) RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
3.9
3.7
4.1
3.9
V
V
Maximum Output Swing (Negative) RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
0.9
1.1
1.1
1.3
V
V
IOUT Maximum Output Current VOUT = 3.5V or 1.5V, 30mV Overdrive ±25 ±40 mA
ISC Output Short-Circuit Current VOUT = 2.5V, 1V Overdrive (Note 3) ±55 ±80 mA
SR Slew Rate AV = –1 (Note 5) 200 350 V/μs
FPBW Full Power Bandwidth 1V Peak (Note 6) 55 MHz
GBW Gain Bandwidth Product f = 200kHz 65 94 MHz
tr, tfRise Time, Fall Time AV = 1, 10% to 90%, 0.1V, RL = 100Ω 2.1 ns
OS Overshoot AV = 1, 0.1V, RL = 100Ω 25 %
tPD Propagation Delay AV = 1, 50% VIN to 50% VOUT, 0.1V, RL = 100Ω 3 ns
tsSettling Time 2V Step, 0.1%, AV = –1 30 ns
THD Total Harmonic Distortion f = 1MHz, VOUT = 2VP-P, AV = 2, RL = 500Ω –75 dB
Differential Gain VOUT = 2VP-P, AV = 2, RL = 150Ω 0.22 %
Differential Phase VOUT = 2VP-P, AV = 2, RL = 150Ω 0.21 DEG
ROUT Output Resistance AV = 1, f = 1MHz 0.45 Ω
ISHDN SHDN Pin Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11) –50
0
–20
±1 μA
μA
ISSupply Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11)
2.7
20
3.6
50
mA
μA
0°C ≤ TA ≤ 70°C, VS = ± 5V, VCM = 0V unless otherwise noted (Note 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 4) 2 mV
ΔVOS/ΔT Input Offset Voltage Drift (Note 7) 10 15 μV/°C
IOS Input Offset Current 500 nA
IBInput Bias Current ±5 μA
VCM Input Voltage Range (Positive)
Input Voltage Range (Negative)
3.5
–3.5
V
V
CMRR Common Mode Rejection Ratio VCM = ±3.5V 73 dB
Minimum Supply Voltage ±2 V
PSRR Power Supply Rejection Ratio VS = ±2V to ±5.5V 76 dB
AVOL Large-Signal Voltage Gain VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
1.0
0.7
V/mV
V/mV
VOUT Maximum Output Swing RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
±3.70
±3.25
V
V
IOUT Maximum Output Current VOUT = ±3V, 30mV Overdrive ±35 mA
LT1812 L7 LJUW
LT1812
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SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
ISC Output Short-Circuit Current VOUT = 0V, 1V Overdrive (Note 3) ±60 mA
SR Slew Rate AV = –1 (Note 5) 400 V/μs
GBW Gain Bandwidth Product f = 200kHz 65 MHz
ISHDN SHDN Pin Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11) –150
±1.5 μA
μA
ISSupply Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11)
4.6
150
mA
μA
0°C ≤ TA ≤ 70°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Note 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 4) 2.5 mV
ΔVOS/ΔT Input Offset Voltage Drift (Note 7) 10 15 μV/°C
IOS Input Offset Current 500 nA
IBInput Bias Current ±5 μA
VCM Input Voltage Range (Positive)
Input Voltage Range (Negative)
3.5
1.5
V
V
CMRR Common Mode Rejection Ratio VCM = 1.5V to 3.5V 71 dB
AVOL Large-Signal Voltage Gain VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 1.5V to 3.5V, RL = 100Ω
0.7
0.5
V/mV
V/mV
VOUT Maximum Output Swing (Positive) RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
3.8
3.6
V
V
Maximum Output Swing (Negative) RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
1.2
1.4
V
V
IOUT Maximum Output Current VOUT = 3.5V or 1.5V, 30mV Overdrive ±20 mA
ISC Output Short-Circuit Current VOUT = 2.5V, 1V Overdrive (Note 3) ±45 mA
SR Slew Rate AV = –1 (Note 5) 150 V/μs
GBW Gain Bandwidth Product f = 200kHz 55 MHz
ISHDN SHDN Pin Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11) –75
±1.5 μA
μA
ISSupply Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11)
4.5
75
mA
μA
–40°C ≤ TA ≤ 85°C. VS = ±5V, VCM = 0V unless otherwise noted (Notes 8, 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 4) 3 mV
ΔVOS/ΔT Input Offset Voltage Drift (Note 7) 10 30 μV/°C
IOS Input Offset Current 600 nA
IBInput Bias Current ±6 μA
VCM Input Voltage Range (Positive)
Input Voltage Range (Negative)
3.5
–3.5
V
V
CMRR Common Mode Rejection Ratio VCM = ±3.5V 72 dB
Minimum Supply Voltage ±2 V
PSRR Power Supply Rejection Ratio VS = ±2V to ±5.5V 75 dB
AVOL Large-Signal Voltage Gain VOUT = ±3V, RL = 500Ω
VOUT = ±3V, RL = 100Ω
0.8
0.6
V/mV
V/mV
ELECTRICAL CHARACTERISTICS
0°C ≤ TA ≤ 70°C, VS = ± 5V, VCM = 0V unless otherwise noted (Note 10).
LT1812 L7LJCUEN2
LT1812
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ELECTRICAL CHARACTERISTICS
– 40°C ≤ TA ≤ 85°C. VS = ±5V, VCM = 0V unless otherwise noted (Notes 8, 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOUT Maximum Output Swing RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
±3.60
±3.15
V
V
IOUT Maximum Output Current VOUT = ±3V, 30mV Overdrive ±30 mA
ISC Output Short-Circuit Current VOUT = 0V, 1V Overdrive (Note 3) ±55 mA
SR Slew Rate AV = –1 (Note 5) 350 V/μs
GBW Gain Bandwidth Product f = 200kHz 60 MHz
ISHDN SHDN Pin Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11) –200
±2 μA
μA
ISSupply Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11)
5
200
mA
μA
–40°C ≤ TA ≤ 85°C, VS = 5V, VCM = 2.5V, RL to 2.5V unless otherwise noted (Notes 8, 10).
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VOS Input Offset Voltage (Note 4) 3.5 mV
ΔVOS/ΔT Input Offset Voltage Drift (Note 7) 10 30 μV/°C
IOS Input Offset Current 600 nA
IBInput Bias Current ±6 μA
VCM Input Voltage Range (Positive)
Input Voltage Range (Negative)
3.5
1.5
V
V
CMRR Common Mode Rejection Ratio VCM = 1.5V to 3.5V 70 dB
AVOL Large-Signal Voltage Gain VOUT = 1.5V to 3.5V, RL = 500Ω
VOUT = 2.0V to 3.0V, RL = 100Ω
0.6
0.4
V/mV
V/mV
VOUT Maximum Output Swing (Positive) RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
3.7
3.5
V
V
Maximum Output Swing (Negative) RL = 500Ω, 30mV Overdrive
RL = 100Ω, 30mV Overdrive
1.3
1.5
V
V
IOUT Maximum Output Current VOUT = 3.5V or 1.5V, 30mV Overdrive ±17 mA
ISC Output Short-Circuit Current VOUT = 2.5V, 1V Overdrive (Note 3) ±40 mA
SR Slew Rate AV = –1 (Note 5) 125 V/μs
GBW Gain Bandwidth Product f = 200kHz 50 MHz
ISHDN SHDN Pin Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11) –100
±2 μA
μA
ISSupply Current SHDN > V– + 2.0V (On) (Note 11)
SHDN < V– + 0.4V (Off) (Note 11)
5
100
mA
μA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Exposure to any Absolute Maximum
Rating condition for extended periods may affect device reliability and lifetime.
Note 2: Differential inputs of ±3V are appropriate for transient operation
only, such as during slewing. Large sustained differential inputs can cause
excessive power dissipation and may damage the part.
Note 3: A heat sink may be required to keep the junction temperature below
absolute maximum when the output is shorted indefi nitely.
Note 4: Input offset voltage is pulse tested and is exclusive of warm-up drift.
Note 5: Slew rate is measured between ±2V on the output with ±3V input for
±5V supplies and 2VP-P on the output with a 3VP-P input for single 5V supplies.
Note 6: Full power bandwidth is calculated from the slew rate: FPBW = SR/2πVP
.
Note 7: This parameter is not 100% tested.
Note 8: The LT1812C is guaranteed to meet specifi ed performance from
0°C to 70°C. The LT1812C is designed, characterized and expected to
meet specifi ed performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1812I is guaranteed to meet specifi ed
performance from –40°C to 85°C.
Note 9: Thermal resistance varies with the amount of PC board metal conn-
ected to the package. The nominal values are for short traces connected to the
pins. The thermal resistance can be substantially reduced by connecting Pin 2
of the 5-lead or 6-lead TSOT-23 or Pin 4 of the SO-8 to a large metal area.
Note 10: For the 8-lead SO and 6-lead TSOT-23 parts, the electrical charac-
teristics apply to the “ON” state, unless otherwise noted. These parts are in
the “ON” state when either SHDN is not connected, or SHDN > V– + 2.0V.
Note 11: The shutdown (SHDN) feature is not available on the 5-lead
SOT-23 parts. These parts are always in the “ON” state.
LT1812 R = soon m = mun L7 LJUW
LT1812
7
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current
vs Temperature Input Noise Spectral Density
Open-Loop Gain
vs Resistive Load
Open-Loop Gain vs Temperature
Output Voltage Swing
vs Supply Voltage
Output Voltage Swing
vs Load Current
Supply Current vs Temperature
Input Common Mode Range
vs Supply Voltage
Input Bias Current
vs Common Mode Voltage
TEMPERATURE (°C)
–50 –25
0
SUPPLY CURRENT (mA)
2
5
050 75
1812 G01
1
4
3
25 100 125
VS = ±5V
VS = ±2.5V
SUPPLY VOLTAGE (±V)
0
V–
INPUT COMMON MODE RANGE (V)
1.0
1.5
2.0
V+
–2.0
–1.5
245
1812 G02
0.5
–1.0
–0.5
1367
TA = 25°C
VOS < 1mV
INPUT COMMON MODE VOLTAGE (V)
–5.0
INPUT BIAS CURRENT (μA)
–1.0
–0.5
TA = 25°C
VS = ±5V
5.0
1812 G03
–1.5
–2.0 –2.5 02.5
0
TEMPERATURE (°C)
–50
–0.6
–0.4
0
25 75
1812 G04
–0.8
–1.0
–25 0 50 100 125
–1.2
–1.4
–0.2
INPUT BIAS CURRENT (μA)
VS = ±5V
VS = ±2.5V
FREQUENCY (Hz)
10 100
1
10
in
100
0.1
1
10
1k 10k 100k
1812 G05
TA = 25°C
VS = ±5V
AV = 101
RS = 10k
en
INPUT VOLTAGE NOISE (nV/√Hz)
INPUT CURRENT NOISE (pA/√Hz)
LOAD RESISTANCE (Ω)
100
60
OPEN-LOOP GAIN (dB)
62.5
65.0
67.5
70.0
75.0
1k 10k
1812 G06
72.5
TA = 25°C
VS = ±5V
VS = ±2.5V
TEMPERATURE (°C)
–50
OPEN-LOOP GAIN (dB)
70.0
72.5
75.0
25 75
1812 G07
67.5
65.0
–25 0 50 100 125
62.5
60.0
VS = ±5V
VO = ±3V
RL = 500Ω
RL = 100Ω
SUPPLY VOLTAGE (±V)
0
V–
OUTPUT VOLTAGE SWING (V)
1.0
1.5
2.0
V+
–2.0
–1.5
245
1812 G08
0.5
–1.0
–0.5
1367
TA = 25°C
VIN = 30mV
RL = 100Ω
RL = 100Ω
RL = 500Ω
RL = 500Ω
OUTPUT CURRENT (mA)
–60
OUTPUT VOLTAGE SWING (V)
–2.0
–1.0
–1.5
V+
–0.5
20
1812 G09
2.0
1.0
1.5
0.5
V–
–40 –20 040 60
VS = ±5V
VIN = 30mV
85°C
25°C
–40°C
LT1812 GBW M = mus) PHASE MA 25°C :5v 4 sum W W» SETTLWG F: R5 = 500$) o m L7LJCUEN2
LT1812
8
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TYPICAL PERFORMANCE CHARACTERISTICS
Settling Time vs Output Step
Gain Bandwidth and Phase
Margin vs Supply Voltage Gain vs Frequency
Output Impedance vs Frequency
Gain Bandwidth and Phase
Margin vs Temperature Gain vs Frequency
Output Short-Circuit Current
vs Temperature
Open-Loop Gain and Phase
vs Frequency Gain vs Frequency
TEMPERATURE (°C)
–50
OUTPUT SHORT-CIRCUIT CURRENT (mA)
110
115
120
25 75
1812 G10
105
100
–25 0 50 100 125
95
90
SOURCE
SINK
VS = ±5V
SETTLING TIME (ns)
0
–5
OUTPUT STEP (V)
–4
–2
–1
0
5
2
10 20 25
1812 G11
–3
3
4
1
515 30 35
TA = 25°C
VS = ±5V
AV = –1
RF = 500Ω
CF = 3pF
0.1% SETTLING
FREQUENCY (Hz)
10
GAIN (dB)
20
40
60
70
10k 1M 10M 1000M
1812 G13
0
100k 100M
50
30
–10
0
PHASE (DEG)
20
60
100
120
–20
80
40
–40
PHASE
GAIN
±5V
±5V
±2.5V
±2.5V
TA = 25°C
AV = –1
RF = RG = 500Ω
FREQUENCY (Hz)
1M
–6
GAIN (dB)
–4
–2
0
2
10M 100M 500M
1812 G16
–8
–10
–12
–14
4
6TA = 25°C
AV = 1
NO RLVS = ±2.5V
VS = ±5V
FREQUENCY (Hz)
1M
2
GAIN (dB)
4
6
8
10M 100M 500M
1812 G17
0
–2
–4
–6
VS = ±5V
TA = 25°C
AV = 2
RL = 100Ω
VS = ±2.5V
SUPPLY VOLTAGE (±V)
0
GAIN BANDWIDTH (MHz)
PHASE MARGIN (DEG)
3
1812 G19
70 45
40
35
12 4
110
90
567
TA = 25°C GBW
RL = 500Ω
GBW
RL = 100Ω
PHASE MARGIN
RL = 100Ω
PHASE MARGIN
RL = 500Ω
FREQUENCY (Hz)
10k 100k
0.001
OUTPUT IMPEDANCE (Ω)
0.1
100
1M 10M 100M
1812 G12
0.01
1
10 AV = 100
AV = 10
AV = 1
TA = 25°C
VS = ±5V
TEMPERATURE (°C)
–50 –25
GAIN BANDWIDTH (MHz)
PHASE MARGIN (DEG)
85
115
050 75
1812 G15
36
40
38
105
95
25 100 125
GBW
VS = ±5V
GBW
VS = ±2.5V
PHASE MARGIN
VS = ±2.5V
PHASE MARGIN
VS = ±5V
RL = 500Ω
FREQUENCY (Hz)
1
0
GAIN (dB)
4
8
10M 100M 200M
1812 G18
–4
–8
12 TA = 25°C
AV = –1
VS = ±5V
RF = RG = 500Ω
NO RL
CL= 1000pF
CL= 500pF
CL= 200pF
CL= 100pF
CL= 50pF
CL= 0
LT1812 L = 5005; SR’ SR’ / SR‘ SR L7 LJUW
LT1812
9
1812fb
TYPICAL PERFORMANCE CHARACTERISTICS
Slew Rate vs Supply Voltage Slew Rate vs Supply Voltage Slew Rate vs Input Level
Slew Rate vs Temperature
Total Harmonic Distortion + Noise
vs Frequency
Undistorted Output Swing
vs Frequency
Shutdown Supply Current
vs Temperature
Power Supply Rejection Ratio
vs Frequency
Common Mode Rejection Ratio
vs Frequency
TEMPERATURE (°C)
–50
40
50
70
25 75
1812 G14
30
20
–25 0 50 100 125
10
0
60
SHUTDOWN SUPPLY CURRENT (μA)
VSHDN = V– + 0.4V
VS = ±5V
VS = ±2.5V
FREQUENCY (Hz)
1k 10k 100k
40
POWER SUPPLY REJECTION RATIO (dB)
60
80
1M 10M 100M
1812 G20
20
0
100
–PSRR
+PSRR
TA = 25°C
AV = 1
VS = ±5V
FREQUENCY (Hz)
1k 10k 100k
40
COMMON MODE REJECTION RATIO (dB)
60
80
1M 10M 100M
1812 G21
20
0
100 TA = 25°C
VS = ±5V
SUPPLY VOLTAGE (±V)
0
200
SLEW RATE (V/μs)
300
500
600
700
1200
900
245
1812 G22
400
1000
1100
800
1367
TA =25°C
AV = –1
VIN = VS(TOTAL)/2
RF = RG = RL = 500Ω
SR+
SR–
SUPPLY VOLTAGE (±V)
0
200
SLEW RATE (V/μs)
300
245
1812 G23
400
500
600
1367
TA =25°C
AV = –1
VIN = ±1V
RF = RG = RL = 500Ω
SR–
SR+
INPUT LEVEL (VP-P)
0
200
SLEW RATE (V/μs)
600
1200
245
1812 G24
400
1000
800
13678
TA =25°C
AV = –1
VS = ±5V
RF = RG = RL = 500Ω
SR–
SR+
TEMPERATURE (°C)
–50
SLEW RATE (V/μs)
800
1000
1200
25 75
1812 G25
600
400
–25 0 50 100 125
200
0
SR–
VS = ±5V SR+
VS = ±5V
SR–
VS = ±2.5V
SR+
VS = ±2.5V
FREQUENCY (Hz)
10 100
0.001
0.002
0.005
TOTAL HARMONIC DISTORTION + NOISE (%)
0.01
1k 10k 100k
1812 G26
AV = –1
AV = 1
TA = 25°C
VS = ±5V
VO = 2VP-P
RL = 500Ω
FREQUENCY (Hz)
100k
5
OUTPUT VOLTAGE (VP-P)
6
7
8
9
1M 10M 100M
1812 G27
4
3
1
0
2
AV = –1
AV = 1
TA = 25°C
VS = ±5V
RL = 100Ω
2% MAX DISTORTION
LT1812 DIFFERENT‘AL GAIN m ; ‘50:) RL; DIFFERENT‘AL PHASE m =15nn mrrmum RL , Ik < ‘saum="" l7hfl§fl§="">
LT1812
10
1812fb
TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Transient,
AV = –1
Small-Signal Transient,
AV = 1
Small-Signal Transient,
AV = 1, CL = 1000pF
Large-Signal Transient,
AV = –1
Large-Signal Transient,
AV = 1
Large-Signal Transient,
AV = 1, CL = 1000pF
2nd and 3rd Harmonic Distortion
vs Frequency
Differential Gain and Phase
vs Supply Voltage Capacitive Load Handling
FREQUENCY (Hz)
–100
–70
–80
–90
–30
–40
–50
–60
1812 G28
HARMONIC DISTORTION (dB)
100k 10M
1M
TA = 25°C
AV = 2
VS = ±5V
VO = 2VP-P
2ND HARMONIC
3RD HARMONIC
RL = 100Ω
2ND HARMONIC
RL = 500Ω
3RD HARMONIC
TOTAL SUPPLY VOLTAGE (V)
4
DIFFERENTIAL PHASE (DEG)
DIFFERENTIAL GAIN (%)
0
0.25
TA = 25°C
0.10
810
1812 G29
0.15
0.20
0.05
0
0.25
0.10
0.15
0.20
0.05
612
DIFFERENTIAL GAIN
RL = 150Ω
DIFFERENTIAL PHASE
RL = 150Ω
DIFFERENTIAL PHASE
RL = 1k
DIFFERENTIAL GAIN
RL = 1k
CAPACITIVE LOAD (pF)
10
40
OVERSHOOT (%)
50
60
70
80
100 1000 10000
1812 G30
30
20
10
0
90
100 TA = 25°C
VS = ±5V
AV = 1
AV = –1
LT1812 L7 LJUW
LT1812
11
1812fb
Layout and Passive Components
The LT1812 amplifi er is more tolerant of less than ideal
layouts than other high speed amplifi ers. For maximum
performance (for example, fast settling) use a ground
plane, short lead lengths and RF-quality bypass capacitors
(0.01μF to 0.1μF). For high drive current applications, use
low ESR bypass capacitors (1μF to 10μF tantalum).
The parallel combination of the feedback resistor and gain
setting resistor on the inverting input combine with the
input capacitance to form a pole that can cause peaking
or even oscillations. If feedback resistors greater than 2k
are used, a parallel capacitor of value
C
F > RG • CIN/RF
should be used to cancel the input pole and optimize
dynamic performance. For applications where the DC
noise gain is 1 and a large feedback resistor is used, CF
should be greater than or equal to CIN. An example would
be an I-to-V converter.
Input Considerations
Each of the LT1812 amplifi er inputs is the base of an NPN
and PNP transistor whose base currents are of opposite
polarity and provide fi rst-order bias current cancellation.
Because of variation in the matching of NPN and PNP
beta, the polarity of the input bias current can be positive
or negative. The offset current does not depend on beta
matching and is well controlled. The use of balanced source
resistance at each input is recommended for applications
where DC accuracy must be maximized. The inputs can
withstand differential input voltages of up to 3V without
damage and need no clamping or source resistance for
protection.
The device should not be used as a comparator because
with sustained differential inputs, excessive power dissi-
pation may result.
Capacitive Loading
The LT1812 is stable with a 1000pF capacitive load,
which is outstanding for a 100MHz amplifi er. This is
accomplished by sensing the load induced output pole
and adding compensation at the amplifi er gain node. As
APPLICATIONS INFORMATION
the capacitive load increases, both the bandwidth and
phase margin decrease so there will be peaking in the
frequency domain and in the transient response. Coaxial
cable can be driven directly, but for best pulse fi delity, a
resistor of value equal to the characteristic impedance of
the cable (i.e., 75Ω) should be placed in series with the
output. The other end of the cable should be terminated
with the same value resistor to ground.
Slew Rate
The slew rate is proportional to the differential input
voltage. Highest slew rates are therefore seen in the lowest
gain confi gurations. For example, a 5V output step in a
gain of 10 has a 0.5V input step, whereas in unity gain
there is a 5V input step. The LT1812 is tested for slew
rate in a gain of –1. Lower slew rates occur in higher
gain confi gurations.
Shutdown
The LT1812 has a shutdown pin (SHDN, Pin 8) for
conserving power. When this pin is open or biased at
least 2V above the negative supply, the part operates
normally. When pulled down to V–, the supply current
drops to about 50μA. Typically, the turn-off delay is
1μs and the turn-on delay 0.5μs. The current out of the
SHDN pin is also typically 50μA. In shutdown mode, the
amplifi er output is not isolated from the inputs, so the
LT1812 shutdown feature cannot be used for multiplexing
applications. The 50μA typical shutdown current is
exclusive of any output (load) current. In order to prevent
load current (and maximize the power savings), either
the load needs to be disconnected, or the input signal
needs to be 0V. Even in shutdown mode, the LT1812 can
still drive signifi cant current into a load. For example, in
an AV = 1 confi guration, when driven with a 1V DC input,
the LT1812 drives 2mA into a 100Ω load. It takes about
500μs for the load current to reach this value.
Power Dissipation
The LT1812 combines high speed and large output drive
in a small package. It is possible to exceed the maximum
junction temperature under certain conditions. Maximum
LT1812 v: H: * R r“ aaaaa 2|: «5» : I——EI Jig? fiféfii El L7LJCUEN2
LT1812
12
1812fb
SIMPLIFIED SCHEMATIC
1812 SS
OUT
+IN
–IN
BIAS
CONTROL
RB
V+
V–
SHDN
R1
300Ω
CC
RC
C
APPLICATIONS INFORMATION
junction temperature (TJ) is calculated from the ambient
temperature (TA) and power dissipation (PD) as follows:
T
J = TA + (PD • θJA) (Note 9)
Power dissipation is composed of two parts. The fi rst is due
to the quiescent supply current and the second is due to
on-chip dissipation caused by the load current. The worst-
case load induced power occurs when the output voltage
is at 1/2 of either supply voltage (or the maximum swing
if less than 1/2 supply voltage). Therefore PDMAX is:
P
DMAX = (V+ – V–)(ISMAX) + (V+/2)2/RL or
P
DMAX = (V+ – V–)(ISMAX) + (V+ – VOMAX)(VOMAX/RL)
Example: LT1812CS5 at 70°C, VS = ±5V, RL = 100Ω
P
DMAX = (10V)(4.5mA) + (2.5V)2/10 0Ω = 108mW
T
JMAX = 70°C + (108mW)(250°C/W) = 97°C
Circuit Operation
The LT1812 circuit topology is a true voltage feedback
amplifi er that has the slewing behavior of a current feedback
amplifi er. The operation of the circuit can be understood
by referring to the Simplifi ed Schematic. The inputs are
buffered by complementary NPN and PNP emitter followers
that drive a 300Ω resistor. The input voltage appears across
the resistor generating currents that are mirrored into the
high impedance node. Complementary followers form an
output stage that buffers the gain node from the load. The
bandwidth is set by the input resistor and the capacitance
on the high impedance node. The slew rate is determined by
the current available to charge the gain node capacitance.
This current is the differential input voltage divided by R1,
so the slew rate is proportional to the input. Highest slew
rates are therefore seen in the lowest gain confi gurations.
The RC network across the output stage is bootstrapped
when the amplifi er is driving a light or moderate load
and has no effect under normal operation. When driving
capacitive loads (or a low value resistive load) the network
is incompletely bootstrapped and adds to the compensation
at the high impedance node. The added capacitance slows
down the amplifi er which improves the phase margin by
moving the unity-gain cross away from the pole formed
by the output impedance and the capacitive load. The zero
created by the RC combination adds phase to ensure that
the total phase lag does not exceed 180 degrees (zero
phase margin) and the amplifi er remains stable. In this
way, the LT1812 is stable with up to 1000pF capacitive
loads in unity gain, and even higher capacitive loads in
higher closed-loop gain confi gurations.
LT1812 W ” 31w 7‘ , a a ‘ ;: W i i i EL L , 9 ,i T l T; iT 741i I 7 E Q +fl NH 7 I L7 LJUW
LT1812
13
1812fb
S5 Package
5-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1635)
PACKAGE DESCRIPTION
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45 TYP
5 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) S5 TSOT-23 0302 REV B
PIN ONE
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
LT1812 "W W *1 7+7 7*, DIIIJ \E H @ Kw L »H« e , ._.4 ‘9 L7LJCUEN2
LT1812
14
1812fb
PACKAGE DESCRIPTION
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3) S6 TSOT-23 0302 REV B
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
LT1812 w .15n Inch) 610) (Djflfi; TTHHHH 1 J 7 LDJDD * F H H H H 7 fi‘“ T 7177 v; i $0254) 11‘ Li L? ig‘L‘Hjfi L7 LJUW
LT1812
15
1812fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTION
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)s 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
SO8 0303
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
LT1812 L7LJCUEN2
LT1812
16
1812fb
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1999
LT 0909 REV B • PRINTED IN USA
RELATED PARTS
TYPICAL APPLICATION
PART NUMBER DESCRIPTION COMMENTS
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LT1813 Dual 3mA, 100MHz, 750V/μs Operational Amplifi er Dual Version of the LT1812
C-Load is a trademark of Linear Technology Corporation.
Single 5V Supply 10MS/s 12-Bit ADC Buffer
470pF
–
+
VIN
2VP-P
2.5VDC 68Ω
LT1812 LTC1420
12 BITS
10MS/s
1812 TA03