The IDT first generation of RF Synthesizers are pin and software compatible with other similar solutions from other manufacturers.
This product training module briefly presents the VersaClock 6 and 3S devices from IDT and how to efficiently design them.
This presentation will discuss when and how to properly terminate LVCMOS timing signals.
The low-power HCSL versions of the Romley/Grantley Yellow Cover devices which IDT is developing for the server timing market.
IDT has a solution for all of the major building blocks of PCI-Express. The new family of Low-Power HCSL outputs offer industry-leading power consumption.
The PCI-Express architecture was developed to replace the PCI bus used in older PCI, PCI-X, and AGP standards.
How spread spectrum works, spread types, design considerations, and IDT's wide array of products supporting spread spectrum capabilities.
IDT's timing portfolio for clock distribution and clock generation is diverse, encompassing a wide range of products for various end applications.
VersaClock devices provide fast and easy solutions to meet customers' timing needs and are readily available in the market for mass production of all volumes.