The DE0-Nano-SoC development kit from Terasic presents a robust hardware design platform built around the Altera System-on-Chip (SoC) FPGA, which combines the latest dual-core ARM® Cortex™-A9 embedded cores with industry-leading, programmable logic for ultimate design flexibility. Users can now leverage the power of tremendous re-configurability paired with a high-performance, low-power processor system. Altera’s SoC integrates an ARM-based hard processor system (HPS) consisting of processor, peripherals, and memory interfaces tied seamlessly with the FPGA fabric using a high-bandwidth, interconnect backbone. The DE0-Nano-SoC development board is equipped with high-speed DDR3 memory, analog-to-digital capabilities, Ethernet networking, and much more that promise many exciting applications.
The DE0-Nano-SoC development kit contains all the tools needed to use the board in conjunction with a computer that runs Microsoft Windows XP or later.
||HPS (Hard Processor System)
- Altera Cyclone® V SE 5CSEMA4U23C6N device
- Serial configuration device
- USB-Blaster II onboard for programming; JTAG mode
- 2 push-buttons
- 4 slide-switches
- 8 green user LEDs
- Three 50MHz clock sources from the clock generator
- Two 40-pin expansion header
- One Arduino expansion header (Uno R3 compatibility), can connection with Arduino shields.
- One 10-pin analog input expansion header (shared with Arduino analog input).
- A/D converter, 4-pin SPI interface with FPGA
- 925MHz Dual-core ARM Cortex-A9 processor
- 1GB DDR3 SDRAM (32-bit data bus)
- 1 Gigabit Ethernet PHY with RJ45 connector
- USB OTG port, USB micro-AB connector
- Micro SD card socket
- Accelerometer (I2C interface plus interrupt)
- UART to USB, USB mini-B connector
- Warm-reset button and cold-reset button
- One user button and one user LED
- LTC 2 x 7 expansion header
eewiki: Terasic's Altera Cyclone V SE 5CSEMA4U23C6N based DE0-Nano-SoC or Atlas-SoC kit